[PATCH] D69205: [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,)))
Craig Topper via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Mon Oct 28 11:28:24 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rG3da269a2489f: [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1… (authored by craig.topper).
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D69205/new/
https://reviews.llvm.org/D69205
Files:
llvm/lib/Target/X86/X86ISelLowering.cpp
llvm/test/CodeGen/X86/movmsk-cmp.ll
llvm/test/CodeGen/X86/vector-compare-all_of.ll
llvm/test/CodeGen/X86/vector-compare-any_of.ll
llvm/test/CodeGen/X86/vector-reduce-and-bool.ll
llvm/test/CodeGen/X86/vector-reduce-or-bool.ll
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