[PATCH] D69205: [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,)))

Simon Pilgrim via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Oct 28 05:07:12 PDT 2019

Previous message: [PATCH] D69378: [AArch64][SVE] Implement masked store intrinsics
Next message: [PATCH] D69205: [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,)))
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

RKSimon accepted this revision.
RKSimon added a comment.
This revision is now accepted and ready to land.

LGTM


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D69205/new/

https://reviews.llvm.org/D69205

Previous message: [PATCH] D69378: [AArch64][SVE] Implement masked store intrinsics
Next message: [PATCH] D69205: [X86] Add a DAG combine to turn (and (bitcast (vXi1 (concat_vectors (vYi1 setcc), undef,))), C) into (bitcast (vXi1 (concat_vectors (vYi1 setcc), zero,)))
Messages sorted by: [ date ] [ thread ] [ subject ] [ author ]

More information about the llvm-commits mailing list