[PATCH] D69182: [AMDGPU] Fix Vreg_1 PHI lowering in SILowerI1Copies.
Nicolai Hähnle via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Oct 22 05:06:44 PDT 2019
nhaehnle added a comment.
Right, I don't think RPO hurts, but I also didn't (and still don't) see how it would help due to the possible circularity between PHIs, so I'd rather stick to the simpler iteration. Otherwise somebody looking at the code later may think the RPO is important for some aspect of the algorithm.
The code change LGTM. For the test, I wonder if it wouldn't be better served as a MIR test.
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rG LLVM Github Monorepo
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https://reviews.llvm.org/D69182/new/
https://reviews.llvm.org/D69182
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