[PATCH] D69116: [TargetLowering][DAGCombine][MSP430] Shift Amount Threshold in DAGCombine (1/2)

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Oct 18 12:21:43 PDT 2019


spatel accepted this revision.
spatel added a comment.
This revision is now accepted and ready to land.

LGTM - see inline for a minor improvement.

Do you have commit access?



================
Comment at: llvm/lib/CodeGen/SelectionDAG/TargetLowering.cpp:3611-3612
     if ((Cond == ISD::SETEQ || Cond == ISD::SETNE) &&
         (VT == N0.getValueType() ||
          (isTypeLegal(VT) && VT.bitsLE(N0.getValueType()))) &&
         N0.getOpcode() == ISD::AND) {
----------------
Within this block alone, we call N0.getValueType() at least 6 times. Better to make that a local variable like:
  EVT N0VT = N0.getValueType();


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https://reviews.llvm.org/D69116





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