[PATCH] D69172: AMDGPU: Fix SMEM WAR hazard for gfx10 readlane

[Austin Kerbow via Phabricator via llvm-commits]

kerbowa created this revision.
kerbowa added a reviewer: rampitec.
Herald added subscribers: llvm-commits, hiraditya, t-tye, tpr, dstuttard, yaxunl, nhaehnle, wdng, jvesely, kzhuravl, arsenm.
Herald added a project: LLVM.

Hazard recognizer fails to see hazard with V_READLANE_B32_gfx10.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D69172

Files:
  llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
  llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir


Index: llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
===================================================================
--- llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
+++ llvm/test/CodeGen/AMDGPU/smem-war-hazard.mir
@@ -304,6 +304,20 @@
     S_ENDPGM 0
 ...
 
+# GCN-LABEL: name: hazard_smem_war_readlane_gfx10
+# GCN:      S_LOAD_DWORD_IMM
+# GCN:      $sgpr_null = S_MOV_B32 0
+# GCN-NEXT: V_READLANE_B32_gfx10
+---
+name: hazard_smem_war_readlane_gfx10
+body: |
+  bb.0:
+    liveins: $sgpr0, $sgpr1, $sgpr3, $vgpr0
+    $sgpr2 = S_LOAD_DWORD_IMM $sgpr0_sgpr1, 0, 0, 0
+    $sgpr0 = V_READLANE_B32_gfx10 $vgpr0, $sgpr3
+    S_ENDPGM 0
+...
+
 # GCN-LABEL: name: hazard_smem_war_readfirstlane
 # GCN:      S_LOAD_DWORD_IMM
 # GCN:      $sgpr_null = S_MOV_B32 0
Index: llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
===================================================================
--- llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
+++ llvm/lib/Target/AMDGPU/GCNHazardRecognizer.cpp
@@ -952,6 +952,7 @@
   unsigned SDSTName;
   switch (MI->getOpcode()) {
   case AMDGPU::V_READLANE_B32:
+  case AMDGPU::V_READLANE_B32_gfx10:
   case AMDGPU::V_READFIRSTLANE_B32:
     SDSTName = AMDGPU::OpName::vdst;
     break;


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