[PATCH] D68776: [mips] Fix loading "double" immediate into a GPR and FPR
Miloš Stojanović via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Oct 10 09:47:46 PDT 2019
mstojanovic accepted this revision.
mstojanovic added a comment.
This revision is now accepted and ready to land.
LGTM, just have some clarifying questions.
================
Comment at: llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3481
+
+ if (isABI_N32() || isABI_N64()) {
+ if (loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, true, IDLoc,
----------------
An alternative to this condition could be `isGP64bit()`. Do you think there's a case where this wouldn't work and what do you prefer?
================
Comment at: llvm/lib/Target/Mips/AsmParser/MipsAsmParser.cpp:3482
+ if (isABI_N32() || isABI_N64()) {
+ if (loadImmediate(ImmOp64, TmpReg, Mips::NoRegister, false, true, IDLoc,
+ Out, STI))
----------------
Is there a reason why the `IsAddress` argument is set to `true` in the `loadImmediate()` call?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D68776/new/
https://reviews.llvm.org/D68776
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