[PATCH] D68311: [X86] Rewrite to the vXi1 subvector insertion code to not rely on the value of bits that might be undef

[Craig Topper via Phabricator via llvm-commits]

craig.topper updated this revision to Diff 222866.
craig.topper added a comment.

Address review comments.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68311/new/

https://reviews.llvm.org/D68311

Files:
  llvm/lib/Target/X86/X86ISelLowering.cpp
  llvm/test/CodeGen/X86/avx512-calling-conv.ll
  llvm/test/CodeGen/X86/avx512-ext.ll
  llvm/test/CodeGen/X86/avx512-insert-extract.ll
  llvm/test/CodeGen/X86/avx512-mask-op.ll
  llvm/test/CodeGen/X86/masked_store.ll
  llvm/test/CodeGen/X86/vec_smulo.ll
  llvm/test/CodeGen/X86/vec_umulo.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D68311.222866.patch
Type: text/x-patch
Size: 320384 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20191002/bf62467a/attachment-0001.bin>