[PATCH] D67423: [RISCV] Rename FPRs and use Register arithmetic
Luís Marques via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Sep 27 08:47:27 PDT 2019
This revision was automatically updated to reflect the committed changes.
Closed by commit rL373096: [RISCV] Rename FPRs and use Register arithmetic (authored by luismarques, committed by ).
Changed prior to commit:
https://reviews.llvm.org/D67423?vs=221219&id=222185#toc
Repository:
rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D67423/new/
https://reviews.llvm.org/D67423
Files:
llvm/trunk/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
llvm/trunk/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
llvm/trunk/lib/Target/RISCV/RISCVCallingConv.td
llvm/trunk/lib/Target/RISCV/RISCVISelLowering.cpp
llvm/trunk/lib/Target/RISCV/RISCVRegisterInfo.cpp
llvm/trunk/lib/Target/RISCV/RISCVRegisterInfo.td
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