[PATCH] D68121: [X86] Model MXCSR for all SSE instructions

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

Instead of attributing all these instructions with MXCSR first wouldn't we be better off starting just attributing (V)LDMXCSR/(V)STMXCSR in this patch and then future patches sets up groups of instructions with suitable tests?



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Comment at: llvm/lib/Target/X86/X86InstrFormats.td:230
 class NOTRACK { bit hasNoTrackPrefix = 1; }
+class SIMD_EXP { list<Register> Uses = [MXCSR]; bit mayRaiseFPException = 1; }
 
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craig.topper wrote:
> Is EXP an abbreviation for Exception? If so, I think EXC is probably a better abbreviation
mayRaiseMXCSRException might be better as well - to avoid x87/fpu ambiguity


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  https://reviews.llvm.org/D68121/new/

https://reviews.llvm.org/D68121