[PATCH] D68090: Fix doc for t inline asm constraints for ARM/Thumb

[Pablo Barrio via Phabricator via llvm-commits]

pbarrio added a comment.

Discussing with @chill on a chat, he was happier with the following wording:

"A 32, 64, or 128-bit floating-point/SIMD register in the ranges ``s0-s31``, ``d0-d31``, or ``q0-q15``, respectively."

And so forth. I will change these in all SIMD constraints (w, t, x) in both Thumb1 and ARM/Thumb2 modes.


Repository:
  rG LLVM Github Monorepo

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  https://reviews.llvm.org/D68090/new/

https://reviews.llvm.org/D68090