[PATCH] D68103: [InstCombine] Simplify shift-by-sext to shift-by-zext

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri created this revision.
lebedev.ri added reviewers: spatel, nikic, RKSimon.
lebedev.ri added a project: LLVM.
Herald added a subscriber: hiraditya.

This is valid for any `sext` bitwidth pair:

  Processing /tmp/opt.ll..
  
  ----------------------------------------
    %signed = sext %y
    %r = shl %x, %signed
    ret %r
  =>
    %unsigned = zext %y
    %r = shl %x, %unsigned
    ret %r
    %signed = sext %y
  
  Done: 2016
  Optimization is correct!

(This isn't so for funnel shifts, there it's illegal for e.g. i6->i7.)

Main motivation is the C++ semantics:

  int shl(int a, char b) {
      return a << b;
  }

ends as

  %3 = sext i8 %1 to i32
  %4 = shl i32 %0, %3

https://godbolt.org/z/0jgqUq
which is, as this shows, too pessimistic.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D68103

Files:
  llvm/lib/Transforms/InstCombine/InstCombineShifts.cpp
  llvm/test/Transforms/InstCombine/load-cmp.ll
  llvm/test/Transforms/InstCombine/shift-by-signext.ll

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