[PATCH] D68011: [RISCV] Split SP adjustment to reduce the offset of callee saved register spill and restore

[Luís Marques via Phabricator via llvm-commits]

luismarques added inline comments.


================
Comment at: lib/Target/RISCV/RISCVFrameLowering.cpp:245
+  uint64_t SecondSPAdjustAmount = MFI.getStackSize() - getFirstSPAdjustAmount();
+  if (isSplitSPAdjust(MF) && (SecondSPAdjustAmount > 0)) {
+    adjustReg(MBB, LastFrameDestroy, DL, SPReg, SPReg, SecondSPAdjustAmount,
----------------
If `SecondSPAdjustmentAmount == 0` then haven't we done something wrong? The first SP adjustment becomes the only one, so `isSplitSPAdjust` can't logically be true, right? If you keep the separate boolean/amount, then I would suggest asserting that `SecondSPAdjustmentAmount > 0` when `isSplitSPAdjust` is true.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D68011/new/

https://reviews.llvm.org/D68011