[llvm] r372628 - [BreakFalseDeps] ignore function with minsize attribute
Sanjay Patel via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 23 10:01:02 PDT 2019
Author: spatel
Date: Mon Sep 23 10:01:01 2019
New Revision: 372628
URL: http://llvm.org/viewvc/llvm-project?rev=372628&view=rev
Log:
[BreakFalseDeps] ignore function with minsize attribute
This came up in the x86-specific:
https://bugs.llvm.org/show_bug.cgi?id=43239
...but it is a general problem for the BreakFalseDeps pass.
Dependencies may be broken by adding some other instruction,
so that should be avoided if the overall goal is to minimize size.
Differential Revision: https://reviews.llvm.org/D67363
Modified:
llvm/trunk/lib/CodeGen/BreakFalseDeps.cpp
llvm/trunk/test/CodeGen/ARM/a15-partial-update.ll
llvm/trunk/test/CodeGen/X86/sqrt-partial.ll
llvm/trunk/test/CodeGen/X86/stack-folding-fp-avx1.ll
llvm/trunk/test/CodeGen/X86/stack-folding-fp-sse42.ll
Modified: llvm/trunk/lib/CodeGen/BreakFalseDeps.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/CodeGen/BreakFalseDeps.cpp?rev=372628&r1=372627&r2=372628&view=diff
==============================================================================
--- llvm/trunk/lib/CodeGen/BreakFalseDeps.cpp (original)
+++ llvm/trunk/lib/CodeGen/BreakFalseDeps.cpp Mon Sep 23 10:01:01 2019
@@ -177,6 +177,7 @@ void BreakFalseDeps::processDefs(Machine
assert(!MI->isDebugInstr() && "Won't process debug values");
// Break dependence on undef uses. Do this before updating LiveRegs below.
+ // This can remove a false dependence with no additional instructions.
unsigned OpNum;
unsigned Pref = TII->getUndefRegClearance(*MI, OpNum, TRI);
if (Pref) {
@@ -188,6 +189,11 @@ void BreakFalseDeps::processDefs(Machine
UndefReads.push_back(std::make_pair(MI, OpNum));
}
+ // The code below allows the target to create a new instruction to break the
+ // dependence. That opposes the goal of minimizing size, so bail out now.
+ if (MF->getFunction().hasMinSize())
+ return;
+
const MCInstrDesc &MCID = MI->getDesc();
for (unsigned i = 0,
e = MI->isVariadic() ? MI->getNumOperands() : MCID.getNumDefs();
@@ -208,6 +214,11 @@ void BreakFalseDeps::processUndefReads(M
if (UndefReads.empty())
return;
+ // The code below allows the target to create a new instruction to break the
+ // dependence. That opposes the goal of minimizing size, so bail out now.
+ if (MF->getFunction().hasMinSize())
+ return;
+
// Collect this block's live out register units.
LiveRegSet.init(*TRI);
// We do not need to care about pristine registers as they are just preserved
Modified: llvm/trunk/test/CodeGen/ARM/a15-partial-update.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/ARM/a15-partial-update.ll?rev=372628&r1=372627&r2=372628&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/ARM/a15-partial-update.ll (original)
+++ llvm/trunk/test/CodeGen/ARM/a15-partial-update.ll Mon Sep 23 10:01:01 2019
@@ -56,6 +56,11 @@ ret:
ret void
}
+; If minimizing size, that overrides perf, so no extra vmov.f64 here.
+
+; TODO: This (and above) could use a splat load to remove the false
+; dependence with no extra instruction.
+
define void @t2_minsize(<4 x i8> *%in, <4 x i8> *%out, i32 %n) minsize {
; CHECK-LABEL: t2_minsize:
; CHECK: @ %bb.0: @ %entry
@@ -63,7 +68,6 @@ define void @t2_minsize(<4 x i8> *%in, <
; CHECK-NEXT: add r1, r1, #4
; CHECK-NEXT: .LBB2_1: @ %loop
; CHECK-NEXT: @ =>This Inner Loop Header: Depth=1
-; CHECK-NEXT: vmov.f64 d16, #5.000000e-01
; CHECK-NEXT: vld1.32 {d16[0]}, [r0:32]
; CHECK-NEXT: vmovl.u8 q8, d16
; CHECK-NEXT: vuzp.8 d16, d18
Modified: llvm/trunk/test/CodeGen/X86/sqrt-partial.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/sqrt-partial.ll?rev=372628&r1=372627&r2=372628&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/sqrt-partial.ll (original)
+++ llvm/trunk/test/CodeGen/X86/sqrt-partial.ll Mon Sep 23 10:01:01 2019
@@ -67,7 +67,6 @@ define double @minsize(double %x, double
; SSE-NEXT: mulsd %xmm0, %xmm0
; SSE-NEXT: mulsd %xmm1, %xmm1
; SSE-NEXT: addsd %xmm0, %xmm1
-; SSE-NEXT: xorps %xmm0, %xmm0
; SSE-NEXT: sqrtsd %xmm1, %xmm0
; SSE-NEXT: retq
;
Modified: llvm/trunk/test/CodeGen/X86/stack-folding-fp-avx1.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-folding-fp-avx1.ll?rev=372628&r1=372627&r2=372628&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stack-folding-fp-avx1.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stack-folding-fp-avx1.ll Mon Sep 23 10:01:01 2019
@@ -2876,7 +2876,6 @@ define double @stack_fold_roundsd_minsiz
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: vxorps %xmm0, %xmm0, %xmm0
; CHECK-NEXT: vroundsd $9, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0, %xmm0 # 8-byte Folded Reload
; CHECK-NEXT: retq
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
Modified: llvm/trunk/test/CodeGen/X86/stack-folding-fp-sse42.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/stack-folding-fp-sse42.ll?rev=372628&r1=372627&r2=372628&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/stack-folding-fp-sse42.ll (original)
+++ llvm/trunk/test/CodeGen/X86/stack-folding-fp-sse42.ll Mon Sep 23 10:01:01 2019
@@ -583,7 +583,6 @@ define float @stack_fold_cvtsd2ss(double
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: cvtsd2ss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 8-byte Folded Reload
; CHECK-NEXT: retq
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
@@ -975,7 +974,6 @@ define double @stack_fold_cvtss2sd(float
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: cvtss2sd {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
; CHECK-NEXT: retq
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
@@ -2012,7 +2010,6 @@ define float @stack_fold_roundss(float %
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: roundss $9, {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
; CHECK-NEXT: retq
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
@@ -2181,7 +2178,6 @@ define float @stack_fold_sqrtss(float %a
; CHECK-NEXT: #APP
; CHECK-NEXT: nop
; CHECK-NEXT: #NO_APP
-; CHECK-NEXT: xorps %xmm0, %xmm0
; CHECK-NEXT: sqrtss {{[-0-9]+}}(%r{{[sb]}}p), %xmm0 # 4-byte Folded Reload
; CHECK-NEXT: retq
%1 = tail call <2 x i64> asm sideeffect "nop", "=x,~{xmm1},~{xmm2},~{xmm3},~{xmm4},~{xmm5},~{xmm6},~{xmm7},~{xmm8},~{xmm9},~{xmm10},~{xmm11},~{xmm12},~{xmm13},~{xmm14},~{xmm15},~{flags}"()
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