[PATCH] D67556: [ARM][AArch64][DebugInfo] Improve call site instruction interpretation
Nikola Prica via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 19 06:47:19 PDT 2019
NikolaPrica marked an inline comment as done.
NikolaPrica added inline comments.
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Comment at: lib/CodeGen/AsmPrinter/DwarfDebug.cpp:682-684
+ // TODO: Add support for entry value plus an expression.
+ } else if (ShouldTryEmitEntryVals &&
+ ParamValue->second->getNumElements() == 0) {
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dstenb wrote:
> Any sense of what it would take to add support for such entry values? Would it be enough to store the expression alongside the new register in the work list, and then concatenate the two expressions when finding an instruction that describes the new register? Or must we consider how the expressions look in some way?
I believe that such pair of register and expression would be enough for generating new entry value. For now, there are simple cases such as DW_OP_plus/minus over the parameter forwarding registers. This new restriction came from instructions such as "$w0 = nsw ADDWri $w0, 2, 0".
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D67556/new/
https://reviews.llvm.org/D67556
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