[PATCH] D66773: [TableGen] Emit OperandType enums for RegisterOperands/RegisterClasses
Nicolas Guillemot via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 18 13:01:09 PDT 2019
nlguillemot marked an inline comment as done.
nlguillemot added inline comments.
================
Comment at: utils/TableGen/InstrInfoEmitter.cpp:347-355
+ Record **RecordRangesToAdd[][2] = {
+ {Operands.data(), Operands.data() + Operands.size()},
+ {RegisterOperands.data(),
+ RegisterOperands.data() + RegisterOperands.size()},
+ {RegisterClasses.data(), RegisterClasses.data() + RegisterClasses.size()},
+ };
unsigned EnumVal = 0;
----------------
dsanders wrote:
> Wouldn't it be simpler to have:
> ```
> for (const std::vector<Record *> &CurrentVec
> : { &Operands, &RegisterOperands, &RegisterClasses }) {
> for (const Record *Op : CurrentVec) {
> ```
I think my thought process at the time was that I didn't want to "hard code" the fact that the data comes from a vector... but yeah it's complex and I think I like your suggestion better.
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rL LLVM
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D66773/new/
https://reviews.llvm.org/D66773
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