[PATCH] D66773: [TableGen] Emit OperandType enums for RegisterOperands/RegisterClasses

[Daniel Sanders via Phabricator via llvm-commits]

dsanders added inline comments.


================
Comment at: utils/TableGen/InstrInfoEmitter.cpp:347-355
+  Record **RecordRangesToAdd[][2] = {
+      {Operands.data(), Operands.data() + Operands.size()},
+      {RegisterOperands.data(),
+       RegisterOperands.data() + RegisterOperands.size()},
+      {RegisterClasses.data(), RegisterClasses.data() + RegisterClasses.size()},
+  };
   unsigned EnumVal = 0;
----------------
Wouldn't it be simpler to have:
```
for (const std::vector<Record *> &CurrentVec
        : { &Operands, &RegisterOperands, &RegisterClasses }) {
  for (const Record *Op : CurrentVec) {
```


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66773/new/

https://reviews.llvm.org/D66773