[PATCH] D61675: [WIP] Update IRBuilder::CreateFNeg(...) to return a UnaryOperator

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Sep 16 11:49:16 PDT 2019


spatel added a comment.

In D61675#1671479 <https://reviews.llvm.org/D61675#1671479>, @craig.topper wrote:

> What targets does clang enable FTZ/DAZ on? I don't think it does on X86.


IIUC, the problem is for LLVM targets that are FTZ/DAZ all the time by hardware design, and they may not be in trunk. I don't know if it's explicitly stated anywhere, but we try to support those targets even though they are not IEEE-754 compliant.

For x86 - clang has this -ffast-math hack for Linux:
rL165240 <https://reviews.llvm.org/rL165240>

See also:
https://bugs.llvm.org/show_bug.cgi?id=14024

With fast-math, anything goes, so we don't have to worry about that scenario. 
And I think the case where a user changes MXCSR bits is UB for C/C++ ( https://bugs.llvm.org/show_bug.cgi?id=8100#c15 ). So x86 never has a problem in theory, but it might in practice because users believe that twiddling MXCSR bits is allowed?


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