[llvm] r371989 - [X86][NFC] Add a `use-aa` feature.
Clement Courbet via llvm-commits
llvm-commits at lists.llvm.org
Mon Sep 16 07:05:29 PDT 2019
Author: courbet
Date: Mon Sep 16 07:05:28 2019
New Revision: 371989
URL: http://llvm.org/viewvc/llvm-project?rev=371989&view=rev
Log:
[X86][NFC] Add a `use-aa` feature.
Summary:
This allows enabling useaa on the command-line and will allow enabling the
feature on a per-CPU basis where benchmarking shows improvements.
This is modelled after the ARM/AArch64 target.
Reviewers: RKSimon, andreadb, craig.topper
Subscribers: javed.absar, kristof.beyls, hiraditya, ychen, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D67266
Modified:
llvm/trunk/lib/Target/X86/X86.td
llvm/trunk/lib/Target/X86/X86Subtarget.h
Modified: llvm/trunk/lib/Target/X86/X86.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86.td?rev=371989&r1=371988&r2=371989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86.td (original)
+++ llvm/trunk/lib/Target/X86/X86.td Mon Sep 16 07:05:28 2019
@@ -457,6 +457,10 @@ def FeatureMergeToThreeWayBranch : Subta
"Merge branches to a three-way "
"conditional branch">;
+// Enable use of alias analysis during code generation.
+def FeatureUseAA : SubtargetFeature<"use-aa", "UseAA", "true",
+ "Use alias analysis during codegen">;
+
// Bonnell
def ProcIntelAtom : SubtargetFeature<"", "X86ProcFamily", "IntelAtom", "">;
// Silvermont
Modified: llvm/trunk/lib/Target/X86/X86Subtarget.h
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86Subtarget.h?rev=371989&r1=371988&r2=371989&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86Subtarget.h (original)
+++ llvm/trunk/lib/Target/X86/X86Subtarget.h Mon Sep 16 07:05:28 2019
@@ -427,6 +427,9 @@ protected:
/// Use software floating point for code generation.
bool UseSoftFloat = false;
+ /// Use alias analysis during code generation.
+ bool UseAA = false;
+
/// The minimum alignment known to hold of the stack frame on
/// entry to the function and which must be maintained by every function.
unsigned stackAlignment = 4;
@@ -741,6 +744,7 @@ public:
X86ProcFamily == IntelTRM;
}
bool useSoftFloat() const { return UseSoftFloat; }
+ bool useAA() const override { return UseAA; }
/// Use mfence if we have SSE2 or we're on x86-64 (even if we asked for
/// no-sse2). There isn't any reason to disable it if the target processor
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