[llvm] r371952 - AMDGPU/GlobalISel: Legalize s1 source G_[SU]ITOFP
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 15 17:37:11 PDT 2019
Author: arsenm
Date: Sun Sep 15 17:37:10 2019
New Revision: 371952
URL: http://llvm.org/viewvc/llvm-project?rev=371952&view=rev
Log:
AMDGPU/GlobalISel: Legalize s1 source G_[SU]ITOFP
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=371952&r1=371951&r2=371952&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Sun Sep 15 17:37:10 2019
@@ -415,8 +415,9 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo
{S32, S8}, {S128, S32}, {S128, S64}, {S32, LLT::scalar(24)}})
.scalarize(0);
+ // TODO: Legal for s1->s64, requires split for VALU.
getActionDefinitionsBuilder({G_SITOFP, G_UITOFP})
- .legalFor({{S32, S32}, {S64, S32}, {S16, S32}})
+ .legalFor({{S32, S32}, {S64, S32}, {S16, S32}, {S32, S1}, {S16, S1}})
.lowerFor({{S32, S64}})
.customFor({{S64, S64}})
.scalarize(0);
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir?rev=371952&r1=371951&r2=371952&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-sitofp.mir Sun Sep 15 17:37:10 2019
@@ -29,3 +29,39 @@ body: |
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_SITOFP %0
...
+
+---
+name: sitofp_s_s1
+legalized: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0
+ ; CHECK-LABEL: name: sitofp_s_s1
+ ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+ ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
+ ; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
+ ; CHECK: [[SITOFP:%[0-9]+]]:vgpr(s32) = G_SITOFP [[ICMP]](s1)
+ %0:_(s32) = COPY $sgpr0
+ %1:_(s32) = G_CONSTANT i32 0
+ %2:_(s1) = G_ICMP intpred(eq), %0, %1
+ %3:_(s32) = G_SITOFP %2
+...
+
+---
+name: sitofp_v_s1
+legalized: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: sitofp_v_s1
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+ ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
+ ; CHECK: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
+ ; CHECK: [[SITOFP:%[0-9]+]]:vgpr(s32) = G_SITOFP [[ICMP]](s1)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = G_CONSTANT i32 0
+ %2:_(s1) = G_ICMP intpred(eq), %0, %1
+ %3:_(s32) = G_SITOFP %2
+...
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir?rev=371952&r1=371951&r2=371952&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/regbankselect-uitofp.mir Sun Sep 15 17:37:10 2019
@@ -29,3 +29,39 @@ body: |
%0:_(s32) = COPY $vgpr0
%1:_(s32) = G_UITOFP %0
...
+
+---
+name: uitofp_s_s1
+legalized: true
+
+body: |
+ bb.0:
+ liveins: $sgpr0
+ ; CHECK-LABEL: name: uitofp_s_s1
+ ; CHECK: [[COPY:%[0-9]+]]:sgpr(s32) = COPY $sgpr0
+ ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
+ ; CHECK: [[ICMP:%[0-9]+]]:scc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
+ ; CHECK: [[UITOFP:%[0-9]+]]:vgpr(s32) = G_UITOFP [[ICMP]](s1)
+ %0:_(s32) = COPY $sgpr0
+ %1:_(s32) = G_CONSTANT i32 0
+ %2:_(s1) = G_ICMP intpred(eq), %0, %1
+ %3:_(s32) = G_UITOFP %2
+...
+
+---
+name: uitofp_v_s1
+legalized: true
+
+body: |
+ bb.0:
+ liveins: $vgpr0
+ ; CHECK-LABEL: name: uitofp_v_s1
+ ; CHECK: [[COPY:%[0-9]+]]:vgpr(s32) = COPY $vgpr0
+ ; CHECK: [[C:%[0-9]+]]:sgpr(s32) = G_CONSTANT i32 0
+ ; CHECK: [[ICMP:%[0-9]+]]:vcc(s1) = G_ICMP intpred(eq), [[COPY]](s32), [[C]]
+ ; CHECK: [[UITOFP:%[0-9]+]]:vgpr(s32) = G_UITOFP [[ICMP]](s1)
+ %0:_(s32) = COPY $vgpr0
+ %1:_(s32) = G_CONSTANT i32 0
+ %2:_(s1) = G_ICMP intpred(eq), %0, %1
+ %3:_(s32) = G_UITOFP %2
+...
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