[llvm] r371951 - AMDGPU/GlobalISel: Set type on vgpr live in special arguments
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Sun Sep 15 17:33:00 PDT 2019
Author: arsenm
Date: Sun Sep 15 17:33:00 2019
New Revision: 371951
URL: http://llvm.org/viewvc/llvm-project?rev=371951&view=rev
Log:
AMDGPU/GlobalISel: Set type on vgpr live in special arguments
Fixes assertion with workitem ID intrinsics used in non-kernel
functions.
Modified:
llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
Modified: llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp?rev=371951&r1=371950&r2=371951&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/SIISelLowering.cpp Sun Sep 15 17:33:00 2019
@@ -1671,7 +1671,8 @@ static ArgDescriptor allocateVGPR32Input
assert(Reg != AMDGPU::NoRegister);
MachineFunction &MF = CCInfo.getMachineFunction();
- MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
+ Register LiveInVReg = MF.addLiveIn(Reg, &AMDGPU::VGPR_32RegClass);
+ MF.getRegInfo().setType(LiveInVReg, LLT::scalar(32));
return ArgDescriptor::createRegister(Reg, Mask);
}
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll?rev=371951&r1=371950&r2=371951&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/llvm.amdgcn.workitem.id.ll Sun Sep 15 17:33:00 2019
@@ -88,5 +88,32 @@ bb2:
ret void
}
+; ALL-LABEL: {{^}}test_workitem_id_x_func:
+; ALL: v_lshrrev_b32_e32 v2, 0, v2
+; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
+define void @test_workitem_id_x_func(i32 addrspace(1)* %out) #1 {
+ %id = call i32 @llvm.amdgcn.workitem.id.x()
+ store i32 %id, i32 addrspace(1)* %out
+ ret void
+}
+
+; ALL-LABEL: {{^}}test_workitem_id_y_func:
+; ALL: v_lshrrev_b32_e32 v2, 10, v2
+; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
+define void @test_workitem_id_y_func(i32 addrspace(1)* %out) #1 {
+ %id = call i32 @llvm.amdgcn.workitem.id.y()
+ store i32 %id, i32 addrspace(1)* %out
+ ret void
+}
+
+; ALL-LABEL: {{^}}test_workitem_id_z_func:
+; ALL: v_lshrrev_b32_e32 v2, 20, v2
+; ALL-NEXT: v_and_b32_e32 v2, 0x3ff, v2
+define void @test_workitem_id_z_func(i32 addrspace(1)* %out) #1 {
+ %id = call i32 @llvm.amdgcn.workitem.id.z()
+ store i32 %id, i32 addrspace(1)* %out
+ ret void
+}
+
attributes #0 = { nounwind readnone }
attributes #1 = { nounwind }
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