[lld] r371428 - [mips] Fix decoding of microMIPS JALX instruction

[Simon Atanasyan via llvm-commits]

Author: atanasyan
Date: Mon Sep  9 10:28:45 2019
New Revision: 371428

URL: http://llvm.org/viewvc/llvm-project?rev=371428&view=rev
Log:
[mips] Fix decoding of microMIPS JALX instruction

microMIPS jump and link exchange instruction stores a target in a
26-bits field. Despite other microMIPS JAL instructions these bits
are target address shifted right 2 bits [1]. The patch fixes the
JALX instruction decoding and uses 2-bit shift.

[1] MIPS Architecture for Programmers Volume II-B: The microMIPS32 Instruction Set

Differential Revision: https://reviews.llvm.org/D67320

Modified:
    lld/trunk/test/ELF/mips-micro-cross-calls.s

Modified: lld/trunk/test/ELF/mips-micro-cross-calls.s
URL: http://llvm.org/viewvc/llvm-project/lld/trunk/test/ELF/mips-micro-cross-calls.s?rev=371428&r1=371427&r2=371428&view=diff
==============================================================================
--- lld/trunk/test/ELF/mips-micro-cross-calls.s (original)
+++ lld/trunk/test/ELF/mips-micro-cross-calls.s Mon Sep  9 10:28:45 2019
@@ -22,9 +22,9 @@
 # REG-NEXT:      20034:       08 00 80 11     j       131140 <bar>
 
 # MICRO:      micro:
-# MICRO-NEXT:    20010:       f0 00 80 00     jalx 65536
+# MICRO-NEXT:    20010:       f0 00 80 00     jalx 131072 <__start>
 # MICRO-NEXT:    20014:       00 00 00 00     nop
-# MICRO-NEXT:    20018:       f0 00 80 0c     jalx 65560
+# MICRO-NEXT:    20018:       f0 00 80 0c     jalx 131120 <__LA25Thunk_bar>
 
 # MICRO:      __microLA25Thunk_foo:
 # MICRO-NEXT:    20020:       41 b9 00 02     lui     $25, 2