[llvm] r371107 - [X86] Enable BuildSDIVPow2 for i16.
Craig Topper via llvm-commits
llvm-commits at lists.llvm.org
Thu Sep 5 11:49:52 PDT 2019
Author: ctopper
Date: Thu Sep 5 11:49:52 2019
New Revision: 371107
URL: http://llvm.org/viewvc/llvm-project?rev=371107&view=rev
Log:
[X86] Enable BuildSDIVPow2 for i16.
We're able to use a 32-bit ADD and CMOV here and should work
well with our other i16->i32 promotion optimizations.
Modified:
llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
llvm/trunk/test/CodeGen/X86/combine-sdiv.ll
llvm/trunk/test/CodeGen/X86/combine-srem.ll
Modified: llvm/trunk/lib/Target/X86/X86ISelLowering.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/X86/X86ISelLowering.cpp?rev=371107&r1=371106&r2=371107&view=diff
==============================================================================
--- llvm/trunk/lib/Target/X86/X86ISelLowering.cpp (original)
+++ llvm/trunk/lib/Target/X86/X86ISelLowering.cpp Thu Sep 5 11:49:52 2019
@@ -20098,8 +20098,9 @@ X86TargetLowering::BuildSDIVPow2(SDNode
// fold (sdiv X, pow2)
EVT VT = N->getValueType(0);
- // FIXME: Support i8/i16.
- if ((VT != MVT::i32 && !(Subtarget.is64Bit() && VT == MVT::i64)))
+ // FIXME: Support i8.
+ if (VT != MVT::i16 && VT != MVT::i32 &&
+ !(Subtarget.is64Bit() && VT == MVT::i64))
return SDValue();
unsigned Lg2 = Divisor.countTrailingZeros();
Modified: llvm/trunk/test/CodeGen/X86/combine-sdiv.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-sdiv.ll?rev=371107&r1=371106&r2=371107&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-sdiv.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-sdiv.ll Thu Sep 5 11:49:52 2019
@@ -3168,10 +3168,10 @@ define i8 @combine_i8_sdiv_negpow2(i8 %x
define i16 @combine_i16_sdiv_pow2(i16 %x) {
; CHECK-LABEL: combine_i16_sdiv_pow2:
; CHECK: # %bb.0:
-; CHECK-NEXT: movswl %di, %eax
-; CHECK-NEXT: shrl $27, %eax
-; CHECK-NEXT: andl $15, %eax
-; CHECK-NEXT: addl %edi, %eax
+; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
+; CHECK-NEXT: leal 15(%rdi), %eax
+; CHECK-NEXT: testw %di, %di
+; CHECK-NEXT: cmovnsl %edi, %eax
; CHECK-NEXT: cwtl
; CHECK-NEXT: shrl $4, %eax
; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
@@ -3183,10 +3183,10 @@ define i16 @combine_i16_sdiv_pow2(i16 %x
define i16 @combine_i16_sdiv_negpow2(i16 %x) {
; CHECK-LABEL: combine_i16_sdiv_negpow2:
; CHECK: # %bb.0:
-; CHECK-NEXT: movswl %di, %eax
-; CHECK-NEXT: shrl $23, %eax
-; CHECK-NEXT: movzbl %al, %eax
-; CHECK-NEXT: addl %edi, %eax
+; CHECK-NEXT: # kill: def $edi killed $edi def $rdi
+; CHECK-NEXT: leal 255(%rdi), %eax
+; CHECK-NEXT: testw %di, %di
+; CHECK-NEXT: cmovnsl %edi, %eax
; CHECK-NEXT: cwtl
; CHECK-NEXT: sarl $8, %eax
; CHECK-NEXT: negl %eax
Modified: llvm/trunk/test/CodeGen/X86/combine-srem.ll
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/X86/combine-srem.ll?rev=371107&r1=371106&r2=371107&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/X86/combine-srem.ll (original)
+++ llvm/trunk/test/CodeGen/X86/combine-srem.ll Thu Sep 5 11:49:52 2019
@@ -480,13 +480,12 @@ define i16 @combine_i16_srem_pow2(i16 %x
; CHECK-LABEL: combine_i16_srem_pow2:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: movswl %ax, %ecx
-; CHECK-NEXT: shrl $27, %ecx
-; CHECK-NEXT: andl $15, %ecx
-; CHECK-NEXT: addl %edi, %ecx
+; CHECK-NEXT: leal 15(%rax), %ecx
+; CHECK-NEXT: testw %ax, %ax
+; CHECK-NEXT: cmovnsl %edi, %ecx
; CHECK-NEXT: andl $-16, %ecx
; CHECK-NEXT: subl %ecx, %eax
-; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT: # kill: def $ax killed $ax killed $rax
; CHECK-NEXT: retq
%1 = srem i16 %x, 16
ret i16 %1
@@ -496,13 +495,12 @@ define i16 @combine_i16_srem_negpow2(i16
; CHECK-LABEL: combine_i16_srem_negpow2:
; CHECK: # %bb.0:
; CHECK-NEXT: movl %edi, %eax
-; CHECK-NEXT: movswl %ax, %ecx
-; CHECK-NEXT: shrl $23, %ecx
-; CHECK-NEXT: movzbl %cl, %ecx
-; CHECK-NEXT: addl %edi, %ecx
+; CHECK-NEXT: leal 255(%rax), %ecx
+; CHECK-NEXT: testw %ax, %ax
+; CHECK-NEXT: cmovnsl %edi, %ecx
; CHECK-NEXT: andl $-256, %ecx
; CHECK-NEXT: subl %ecx, %eax
-; CHECK-NEXT: # kill: def $ax killed $ax killed $eax
+; CHECK-NEXT: # kill: def $ax killed $ax killed $rax
; CHECK-NEXT: retq
%1 = srem i16 %x, -256
ret i16 %1
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