[llvm] r371008 - AMDGPU/GlobalISel: Restore insert point when getting aperture
Matt Arsenault via llvm-commits
llvm-commits at lists.llvm.org
Wed Sep 4 19:20:33 PDT 2019
Author: arsenm
Date: Wed Sep 4 19:20:32 2019
New Revision: 371008
URL: http://llvm.org/viewvc/llvm-project?rev=371008&view=rev
Log:
AMDGPU/GlobalISel: Restore insert point when getting aperture
Avoids SSA violations in a future patch.
Modified:
llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
Modified: llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp?rev=371008&r1=371007&r2=371008&view=diff
==============================================================================
--- llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp (original)
+++ llvm/trunk/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp Wed Sep 4 19:20:32 2019
@@ -1326,10 +1326,16 @@ bool AMDGPULegalizerInfo::loadInputValue
// Insert the argument copy if it doens't already exist.
// FIXME: It seems EmitLiveInCopies isn't called anywhere?
if (!MRI.getVRegDef(LiveIn)) {
+ // FIXME: Should have scoped insert pt
+ MachineBasicBlock &OrigInsBB = B.getMBB();
+ auto OrigInsPt = B.getInsertPt();
+
MachineBasicBlock &EntryMBB = B.getMF().front();
EntryMBB.addLiveIn(Arg->getRegister());
B.setInsertPt(EntryMBB, EntryMBB.begin());
B.buildCopy(LiveIn, Arg->getRegister());
+
+ B.setInsertPt(OrigInsBB, OrigInsPt);
}
return true;
Modified: llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir?rev=371008&r1=371007&r2=371008&view=diff
==============================================================================
--- llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir (original)
+++ llvm/trunk/test/CodeGen/AMDGPU/GlobalISel/legalize-addrspacecast.mir Wed Sep 4 19:20:32 2019
@@ -172,17 +172,17 @@ body: |
; VI-LABEL: name: test_addrspacecast_p5_to_p0
; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
- ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
- ; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP %4, [[C]](s64)
- ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
- ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), %0(p5), %2
- ; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT %0(p5)
- ; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
- ; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], %3
; VI: [[COPY1:%[0-9]+]]:_(p5) = COPY $vgpr0
- ; VI: [[C1:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
- ; VI: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
+ ; VI: [[C:%[0-9]+]]:_(p5) = G_CONSTANT i32 0
+ ; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
+ ; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[COPY2]], [[C2]](s64)
+ ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
+ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY1]](p5), [[C]]
+ ; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p5)
+ ; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
+ ; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
; VI: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
; GFX9-LABEL: name: test_addrspacecast_p5_to_p0
; GFX9: [[COPY:%[0-9]+]]:_(p5) = COPY $vgpr0
@@ -255,17 +255,17 @@ body: |
; VI-LABEL: name: test_addrspacecast_p3_to_p0
; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
- ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
- ; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP %4, [[C]](s64)
- ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
- ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), %0(p3), %2
- ; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT %0(p3)
- ; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
- ; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], %3
; VI: [[COPY1:%[0-9]+]]:_(p3) = COPY $vgpr0
- ; VI: [[C1:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
- ; VI: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
+ ; VI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
+ ; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
+ ; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[COPY2]], [[C2]](s64)
+ ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
+ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[COPY1]](p3), [[C]]
+ ; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[COPY1]](p3)
+ ; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
+ ; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
; VI: $vgpr0_vgpr1 = COPY [[SELECT]](p0)
; GFX9-LABEL: name: test_addrspacecast_p3_to_p0
; GFX9: [[COPY:%[0-9]+]]:_(p3) = COPY $vgpr0
@@ -460,26 +460,26 @@ body: |
; VI-LABEL: name: test_addrspacecast_v2p3_to_v2p0
; VI: [[COPY:%[0-9]+]]:_(p4) = COPY $sgpr4_sgpr5
- ; VI: [[C:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
- ; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP %8, [[C]](s64)
- ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
- ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), %3(p3), %6
- ; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT %3(p3)
- ; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
- ; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], %7
; VI: [[COPY1:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1
; VI: [[UV:%[0-9]+]]:_(p3), [[UV1:%[0-9]+]]:_(p3) = G_UNMERGE_VALUES [[COPY1]](<2 x p3>)
- ; VI: [[C1:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
- ; VI: [[C2:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
+ ; VI: [[C:%[0-9]+]]:_(p3) = G_CONSTANT i32 -1
+ ; VI: [[C1:%[0-9]+]]:_(p0) = G_CONSTANT i64 0
; VI: [[COPY2:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
- ; VI: [[GEP1:%[0-9]+]]:_(p4) = G_GEP [[COPY2]], [[C]](s64)
+ ; VI: [[C2:%[0-9]+]]:_(s64) = G_CONSTANT i64 68
+ ; VI: [[GEP:%[0-9]+]]:_(p4) = G_GEP [[COPY2]], [[C2]](s64)
+ ; VI: [[LOAD:%[0-9]+]]:_(s32) = G_LOAD [[GEP]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
+ ; VI: [[ICMP:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p3), [[C]]
+ ; VI: [[PTRTOINT:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV]](p3)
+ ; VI: [[MV:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT]](s32), [[LOAD]](s32)
+ ; VI: [[SELECT:%[0-9]+]]:_(p0) = G_SELECT [[ICMP]](s1), [[MV]], [[C1]]
+ ; VI: [[COPY3:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
+ ; VI: [[GEP1:%[0-9]+]]:_(p4) = G_GEP [[COPY3]], [[C2]](s64)
; VI: [[LOAD1:%[0-9]+]]:_(s32) = G_LOAD [[GEP1]](p4) :: (dereferenceable invariant load 4 from `i8 addrspace(4)* undef` + 68, addrspace 4)
- ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV]](p3), [[C1]]
- ; VI: [[PTRTOINT1:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV]](p3)
+ ; VI: [[ICMP1:%[0-9]+]]:_(s1) = G_ICMP intpred(ne), [[UV1]](p3), [[C]]
+ ; VI: [[PTRTOINT1:%[0-9]+]]:_(s32) = G_PTRTOINT [[UV1]](p3)
; VI: [[MV1:%[0-9]+]]:_(p0) = G_MERGE_VALUES [[PTRTOINT1]](s32), [[LOAD1]](s32)
- ; VI: [[SELECT1:%[0-9]+]]:_(p0) = G_SELECT [[ICMP1]](s1), [[MV1]], [[C2]]
- ; VI: [[COPY3:%[0-9]+]]:_(p4) = COPY [[COPY]](p4)
- ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[SELECT1]](p0), [[SELECT]](p0)
+ ; VI: [[SELECT1:%[0-9]+]]:_(p0) = G_SELECT [[ICMP1]](s1), [[MV1]], [[C1]]
+ ; VI: [[BUILD_VECTOR:%[0-9]+]]:_(<2 x p0>) = G_BUILD_VECTOR [[SELECT]](p0), [[SELECT1]](p0)
; VI: $vgpr0_vgpr1_vgpr2_vgpr3 = COPY [[BUILD_VECTOR]](<2 x p0>)
; GFX9-LABEL: name: test_addrspacecast_v2p3_to_v2p0
; GFX9: [[COPY:%[0-9]+]]:_(<2 x p3>) = COPY $vgpr0_vgpr1
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