[PATCH] D67192: [X86] Use MOVSX instead of CBW to extend i8 to AX for i8 sdiv.

Craig Topper via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 4 13:12:21 PDT 2019


craig.topper created this revision.
craig.topper added reviewers: spatel, RKSimon, xbolva00, lebedev.ri.
Herald added a subscriber: hiraditya.
Herald added a project: LLVM.

The CBW instruction sign extends AL to AX. But if the input isn't in AL yet we need to copy it there. MOVSX on the other hand has an independent source and destination register. So it can copy any 8-bit value into AX in one operation saving the copy. It can also fold a load which CBW can't.

This patch switches our sdiv isel to use MOVSX to allow these improvements. I'm extending all the way to i32 because that's one byte shorter to encode. It also avoids a partial register dependency on bits 31:16 of the output register on recent Intel CPUs. Unfortunately, this prevents X86MCInstLowering from being able to turn the MOVSX back into CBW if the register allocation works out that the input is in AL already. CBW is immune to the partial read issue on recent CPUs. But I think CBW is 3 bytes to encode and MOVSX i8->i32 is also 3 bytes so maybe this loss doesn't matter. If its important we could probably emit i8->i16 from isel and teach FixupBWInst to turn i8->i16 into i8->i32 when it won't interfere with CBW formation.


https://reviews.llvm.org/D67192

Files:
  llvm/lib/Target/X86/X86ISelDAGToDAG.cpp
  llvm/test/CodeGen/X86/2011-10-19-LegelizeLoad.ll
  llvm/test/CodeGen/X86/div-rem-pair-recomposition-signed.ll
  llvm/test/CodeGen/X86/divrem.ll
  llvm/test/CodeGen/X86/divrem8_ext.ll
  llvm/test/CodeGen/X86/scalar_widen_div.ll
  llvm/test/CodeGen/X86/vector-idiv-sdiv-128.ll

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