[PATCH] D67136: GlobalISel/TableGen: Handle REG_SEQUENCE patterns

Jessica Paquette via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Wed Sep 4 11:21:19 PDT 2019


paquette accepted this revision.
paquette added a comment.
This revision is now accepted and ready to land.

LGTM with style nit



================
Comment at: utils/TableGen/GlobalISelEmitter.cpp:4116-4119
+    if (!RCDef) {
+      return failedImport("REG_SEQUENCE child #0 could not "
+                          "be coerced to a register class");
+    }
----------------
remove braces


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67136/new/

https://reviews.llvm.org/D67136





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