[PATCH] D67100: GlobalISel/TableGen: Don't skip REG_SEQUENCE based on patterns
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Sep 3 09:23:46 PDT 2019
arsenm added a comment.
In D67100#1655709 <https://reviews.llvm.org/D67100#1655709>, @paquette wrote:
> Testcase to verify that we still reject it?
Kind of a waste of time since I have 90% of the patch to actually handle it done already
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D67100/new/
https://reviews.llvm.org/D67100
More information about the llvm-commits
mailing list