[PATCH] D67021: [DAGCombiner] improve throughput of shift+logic+shift

Sanjay Patel via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Sun Sep 1 05:35:32 PDT 2019


spatel updated this revision to Diff 218257.
spatel marked 3 inline comments as done.
spatel added a comment.

Patch updated:
Try to improve readability.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D67021/new/

https://reviews.llvm.org/D67021

Files:
  llvm/lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  llvm/test/CodeGen/AArch64/bitfield-insert.ll
  llvm/test/CodeGen/AArch64/shift-logic.ll
  llvm/test/CodeGen/Thumb2/2010-03-15-AsmCCClobber.ll
  llvm/test/CodeGen/X86/shift-logic.ll

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D67021.218257.patch
Type: text/x-patch
Size: 14672 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190901/489418d8/attachment.bin>


More information about the llvm-commits mailing list