[PATCH] D64953: GlobalISel: Support physical register inputs in patterns

[Matt Arsenault via Phabricator via llvm-commits]

arsenm updated this revision to Diff 218245.
arsenm added a comment.

Add reg bank check. This requires a new method to get a register class from a physical register. The existing getRegClassForRegister would fail for AMDGPU for two reasons. First it would give up because the types of all classes weren't exactly the same. With that fixed, it would also find a non-allocatable super class used for operand constraints which does not have a meaningful reg bank.


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64953/new/

https://reviews.llvm.org/D64953

Files:
  include/llvm/CodeGen/GlobalISel/InstructionSelectorImpl.h
  lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp
  test/CodeGen/AMDGPU/GlobalISel/inst-select-amdgcn.s.sendmsg.mir
  test/TableGen/gisel-physreg-input.td
  utils/TableGen/CodeGenRegisters.cpp
  utils/TableGen/CodeGenRegisters.h
  utils/TableGen/GlobalISelEmitter.cpp

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