[PATCH] D66882: [DAGCombiner] Match (add X, X) as (shl X, 1) when detecting rotate.
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Aug 30 07:33:37 PDT 2019
lebedev.ri added inline comments.
================
Comment at: lib/CodeGen/SelectionDAG/DAGCombiner.cpp:6120
// result matches up with the existing shift's LHS op.
if (IsMulOrDiv) {
// Op to extract from is a mul or udiv by a constant.
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Hm, this function already handles non-shifts.
Can it simply be extended with a similar block?
Repository:
rL LLVM
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https://reviews.llvm.org/D66882/new/
https://reviews.llvm.org/D66882
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