[PATCH] D66882: [DAGCombiner] Match (add X, X) as (shl X, 1) when detecting rotate.

[Amaury SECHET via Phabricator via llvm-commits]

deadalnix updated this revision to Diff 217843.
deadalnix added a comment.

- Avoid creating the shift node when not stricly required.
- Add negative tests.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D66882/new/

https://reviews.llvm.org/D66882

Files:
  lib/CodeGen/SelectionDAG/DAGCombiner.cpp
  test/CodeGen/X86/rotate-extract-vector.ll
  test/CodeGen/X86/rotate-extract.ll

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