[PATCH] D66882: [DAGCombiner] Match (add X, X) as (shl X, 1) when detecting rotate.

[Roman Lebedev via Phabricator via llvm-commits]

lebedev.ri added a comment.

Pattern look good to me, but i recall having disscussion in https://reviews.llvm.org/D64275#inline-576684
Granted, that is InstCombine, but what happens here if we create instruction but then fail to fold?


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  rL LLVM

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  https://reviews.llvm.org/D66882/new/

https://reviews.llvm.org/D66882