[PATCH] D66730: Bug fix on function epilog optimization (ARM backend)

[Rainer Herbertz via Phabricator via llvm-commits]

rOptimizer created this revision.
Herald added subscribers: llvm-commits, hiraditya, kristof.beyls, javed.absar.
Herald added a project: LLVM.

To save a 'add sp,#val' instruction by adding registers to the final pop instruction,
the first register transferred by this pop instruction need to be found.
If the function to be optimized has a non-void return value, the operand list contains
r0 (implicit) which prevents the optimization to take place.
Therefore implicit register references should be skipped in the search loop,
because this registers are never popped from the stack.

Merge branch 'master' of https://github.com/llvm/llvm-project


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D66730

Files:
  llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp


Index: llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
===================================================================
--- llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
+++ llvm/lib/Target/ARM/ARMBaseInstrInfo.cpp
@@ -2420,7 +2420,8 @@
     MachineOperand &MO = MI->getOperand(i);
     RegList.push_back(MO);
 
-    if (MO.isReg() && TRI->getEncodingValue(MO.getReg()) < FirstRegEnc)
+    if (MO.isReg() && !MO.isImplicit() &&
+        TRI->getEncodingValue(MO.getReg()) < FirstRegEnc)
       FirstRegEnc = TRI->getEncodingValue(MO.getReg());
   }
 


-------------- next part --------------
A non-text attachment was scrubbed...
Name: D66730.217094.patch
Type: text/x-patch
Size: 542 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190826/4740e665/attachment.bin>