[PATCH] D66519: [ARM] Fix lsrl with a 128/256 bit shift amount or a shift of 32

[Dave Green via Phabricator via llvm-commits]

dmgreen added inline comments.


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Comment at: llvm/lib/Target/ARM/ARMISelLowering.cpp:5940
+    // If the shift amount is greater than 32 or has a greater bitwidth than 64 then do the default optimisation
+    if (ShAmt->getValueType(0).getSizeInBits() > 64 || (Con && Con->getZExtValue() >= 32))
       return SDValue();
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  https://reviews.llvm.org/D66519/new/

https://reviews.llvm.org/D66519