[PATCH] D66515: [MVT] Add v16f16 and v32f16 vectors.

[Craig Topper via Phabricator via llvm-commits]

craig.topper created this revision.
craig.topper added reviewers: RKSimon, spatel, arsenm.
Herald added subscribers: aheejin, hiraditya, nhaehnle, wdng, jvesely, dschuff.
Herald added a project: LLVM.

I might look at improving PR43065 which will require being
able to mark a 256 and 512 bit vector of f16 as Legal.


Repository:
  rG LLVM Github Monorepo

https://reviews.llvm.org/D66515

Files:
  llvm/include/llvm/CodeGen/ValueTypes.td
  llvm/include/llvm/Support/MachineValueType.h
  llvm/lib/CodeGen/ValueTypes.cpp
  llvm/lib/Target/AMDGPU/AMDGPUISelLowering.cpp
  llvm/test/TableGen/intrinsic-varargs.td

-------------- next part --------------
A non-text attachment was scrubbed...
Name: D66515.216335.patch
Type: text/x-patch
Size: 14682 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190821/58f5b015/attachment-0001.bin>