[PATCH] D62592: [RISCV] Add assembler support for RVC HINT instructions

[Luís Marques via Phabricator via llvm-commits]

luismarques updated this revision to Diff 214981.
luismarques edited the summary of this revision.
luismarques added a comment.
Herald added a subscriber: hiraditya.

Adds MC layer support, using the approach suggested by Shiva (thanks!), and updates the tests to test that additional support.
Updates the summary, so it no longer says MC layer support is missing.


Repository:
  rG LLVM Github Monorepo

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D62592/new/

https://reviews.llvm.org/D62592

Files:
  llvm/lib/Target/RISCV/AsmParser/RISCVAsmParser.cpp
  llvm/lib/Target/RISCV/Disassembler/RISCVDisassembler.cpp
  llvm/lib/Target/RISCV/RISCV.td
  llvm/lib/Target/RISCV/RISCVInstrInfo.td
  llvm/lib/Target/RISCV/RISCVInstrInfoC.td
  llvm/lib/Target/RISCV/RISCVRegisterInfo.td
  llvm/lib/Target/RISCV/RISCVSubtarget.h
  llvm/test/MC/RISCV/rv32c-invalid.s
  llvm/test/MC/RISCV/rv64c-hints-valid.s
  llvm/test/MC/RISCV/rvc-hints-invalid.s
  llvm/test/MC/RISCV/rvc-hints-valid.s

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