[PATCH] D66132: [CodeGen] Add `isSpeculativeExecutionForbidden()` to `TargetInstrInfo` (PRR42405)
Roman Lebedev via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Aug 13 10:03:03 PDT 2019
lebedev.ri added inline comments.
================
Comment at: llvm/include/llvm/CodeGen/TargetInstrInfo.h:1026-1028
+ /// This prevents MIR code from SimplePRE optimization leading to possible
+ /// speculative execution of instructions.
+ virtual bool isSpeculativeExecutionForbidden() const { return false; }
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Regardless of my bikeshedding if this is the correct fix or not,
this should be renamed to be less misleading.
Just name it `shouldDoPartialRedundancyElimination()` ?
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D66132/new/
https://reviews.llvm.org/D66132
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