[PATCH] D65929: [ARM] Make v2i1 a valid type for the MVE predicate register.

[Simon Tatham via Phabricator via llvm-commits]

simon_tatham added a comment.

Hmm. I may have underestimated the difficulty, then! My thought was that all I really needed was to arrange that if you already had a v2i1, you could use it as the predicate operand for one of the 64-bit-lane instructions and not have instruction selection fail, and perhaps if you already had a pair of them you could do bitwise ops between them just like you can with all the others.

I can write some simple codegen tests for the things I've just mentioned, but it sounds as if there are more complicated things I've overlooked that will also need testing?


Repository:
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  https://reviews.llvm.org/D65929/new/

https://reviews.llvm.org/D65929