[PATCH] D65887: [TargetLowering] SimplifyDemandedBits - call SimplifyMultipleUseDemandedBits for ISD::EXTRACT_VECTOR_ELT

[Simon Pilgrim via Phabricator via llvm-commits]

RKSimon added a comment.

@tlively Another thing we could consider is adding WebAssemblyISD opcodes for zero extending extract vector element - similar to what X86ISD does with PEXTRW/PEXTRB - this would avoid the need for the (and, extract_element(v, c), 0xFFFF) pattern that is causing all the problems.


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D65887/new/

https://reviews.llvm.org/D65887