[PATCH] D64834: [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions.
Matt Arsenault via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 16 15:40:57 PDT 2019
arsenm added inline comments.
================
Comment at: llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp:132-134
bool isImm(int64_t MinValue, int64_t MaxValue) const {
return Kind == Immediate && inRange(getImm(), MinValue, MaxValue);
}
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There are already various forms of isInt/isUInt in MathExtras.h
Repository:
rG LLVM Github Monorepo
CHANGES SINCE LAST ACTION
https://reviews.llvm.org/D64834/new/
https://reviews.llvm.org/D64834
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