[PATCH] D64834: [Xtensa 8/10] Add support of the Xtensa shift/load/store/move and processor control instructions.
Andrei Safronov via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Tue Jul 16 15:32:29 PDT 2019
andreisfr created this revision.
andreisfr added reviewers: jyknight, ivanbaev.
Herald added subscribers: llvm-commits, hiraditya.
Herald added a project: LLVM.
Add new subset of Core Instructions (not full yet). Add appropriate operands description,
modify asm parser, printer and code emitter. Modify tests to support new instructions.
Repository:
rG LLVM Github Monorepo
https://reviews.llvm.org/D64834
Files:
llvm/lib/Target/Xtensa/AsmParser/XtensaAsmParser.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.cpp
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaInstPrinter.h
llvm/lib/Target/Xtensa/MCTargetDesc/XtensaMCCodeEmitter.cpp
llvm/lib/Target/Xtensa/XtensaInstrInfo.td
llvm/lib/Target/Xtensa/XtensaOperands.td
llvm/test/MC/Xtensa/xtensa-invalid.s
llvm/test/MC/Xtensa/xtensa-valid.s
-------------- next part --------------
A non-text attachment was scrubbed...
Name: D64834.210202.patch
Type: text/x-patch
Size: 40083 bytes
Desc: not available
URL: <http://lists.llvm.org/pipermail/llvm-commits/attachments/20190716/276cbdda/attachment-0001.bin>
More information about the llvm-commits
mailing list