[PATCH] D64446: [AMDGPU] gfx908 mAI instructions, MC part

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 9 14:13:13 PDT 2019


arsenm added inline comments.


================
Comment at: include/llvm/IR/IntrinsicsAMDGPU.td:1648
+  [llvm_float_ty, llvm_float_ty, llvm_v32i32_ty,
+   llvm_i32_ty, llvm_i32_ty, llvm_i32_ty], [IntrConvergent, IntrNoMem]>;
+
----------------
Should these be speculatable?


================
Comment at: lib/Target/AMDGPU/AMDGPURegAsmNames.inc.cpp:353
 
+static const char *const AGPR32RegNames[] = {
+    "a0",   "a1",   "a2",   "a3",   "a4",   "a5",   "a6",   "a7",   "a8",
----------------
We should probably get around to making tablegen produce these tables


================
Comment at: lib/Target/AMDGPU/SIInstrFormats.td:125
+  // This bit indicates that this is one of MFMA instructions.
+  field bit IsMAI = 0;
+
----------------
It's not obvious to me what MAI stands for


CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D64446/new/

https://reviews.llvm.org/D64446





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