[llvm] r365022 - [mips] Add missing mips16 instructions to general scheduling definitions
Simon Atanasyan via llvm-commits
llvm-commits at lists.llvm.org
Wed Jul 3 03:33:09 PDT 2019
Author: atanasyan
Date: Wed Jul 3 03:33:09 2019
New Revision: 365022
URL: http://llvm.org/viewvc/llvm-project?rev=365022&view=rev
Log:
[mips] Add missing mips16 instructions to general scheduling definitions
Modified:
llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
llvm/trunk/lib/Target/Mips/MipsScheduleGeneric.td
Modified: llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td?rev=365022&r1=365021&r2=365022&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td (original)
+++ llvm/trunk/lib/Target/Mips/Mips16InstrInfo.td Wed Jul 3 03:33:09 2019
@@ -483,13 +483,11 @@ class SelT<string op1, string op2>:
//
// 32 bit constant
//
-def Constant32:
- MipsPseudo16<(outs), (ins simm32:$imm), "\t.word $imm", []>;
+def Constant32 : MipsPseudo16<(outs), (ins simm32:$imm), "\t.word $imm", []>;
-def LwConstant32:
+def LwConstant32 :
MipsPseudo16<(outs CPU16Regs:$rx), (ins simm32:$imm, simm32:$constid),
- "lw\t$rx, 1f\n\tb\t2f\n\t.align\t2\n1: \t.word\t$imm\n2:", []>;
-
+ "lw\t$rx, 1f\n\tb\t2f\n\t.align\t2\n1: \t.word\t$imm\n2:", []>;
//
// Some general instruction class info
Modified: llvm/trunk/lib/Target/Mips/MipsScheduleGeneric.td
URL: http://llvm.org/viewvc/llvm-project/llvm/trunk/lib/Target/Mips/MipsScheduleGeneric.td?rev=365022&r1=365021&r2=365022&view=diff
==============================================================================
--- llvm/trunk/lib/Target/Mips/MipsScheduleGeneric.td (original)
+++ llvm/trunk/lib/Target/Mips/MipsScheduleGeneric.td Wed Jul 3 03:33:09 2019
@@ -79,6 +79,9 @@ def : InstRW<[GenericWriteALU], (instrs
SraX16, SrlvRxRy16, SrlX16, SubuRxRyRz16,
XorRxRxRy16)>;
+def : InstRW<[GenericWriteALU], (instrs Constant32, LwConstant32,
+ GotPrologue16, CONSTPOOL_ENTRY)>;
+
// microMIPS
// =========
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