[PATCH] D30324: [ARM] Thumb2: favor R4-R7 over R12/LR in allocation order when opt for minsize

[Oliver Stannard (Linaro) via Phabricator via llvm-commits]

ostannard marked an inline comment as done.
ostannard added inline comments.


================
Comment at: llvm/lib/CodeGen/RegisterClassInfo.cpp:118
 
-    if (CalleeSavedAliases[PhysReg])
+    if (CalleeSavedAliases[PhysReg] && !STI.ignoreCSRForAllocationOrder(*MF))
       // PhysReg aliases a CSR, save it for later.
----------------
jmolloy wrote:
> Although you're not using it here, it seems to me very natural for such a callback to take the PhysReg too.
I'd rather not add extra code which we don't currently have a use for. That can easily be done later if it does turn out to be useful.


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  https://reviews.llvm.org/D30324/new/

https://reviews.llvm.org/D30324