[PATCH] D64091: ScheduleDAG: Fix incorrectly killing registers in bundles

Matt Arsenault via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Tue Jul 2 11:35:27 PDT 2019


arsenm created this revision.
arsenm added reviewers: MatzeB, qcolombet, fhahn, courbet.
Herald added subscribers: jsji, nhaehnle, wdng, jvesely.

When looking for uses/defs to add kill flags, the iterator was double
incremented, skipping the first instruction in the bundle. The use
register in the first bundle instruction was then incorrectly killed.
The "First" instruction should be the BUNDLE itself as the proper
reverse iterator endpoint.


https://reviews.llvm.org/D64091

Files:
  lib/CodeGen/ScheduleDAGInstrs.cpp
  test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir


Index: test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir
===================================================================
--- /dev/null
+++ test/CodeGen/AMDGPU/post-ra-sched-kill-bundle-use-inst.mir
@@ -0,0 +1,42 @@
+# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=gfx900 -run-pass=post-RA-sched -verify-machineinstrs -o -  %s | FileCheck %s
+
+# The scheduler was not inspecting the first instruction in the bundle
+# when adding kill flags, so it would incorrectly mark the first use
+# of $vgpr0 as killed.
+
+---
+name: kill_flag_use_first_bundle_inst
+tracksRegLiveness: true
+machineFunctionInfo:
+  isEntryFunction: true
+body:             |
+  bb.0:
+    liveins: $sgpr4_sgpr5, $sgpr7
+
+    ; CHECK-LABEL: name: kill_flag_use_first_bundle_inst
+    ; CHECK: liveins: $sgpr4_sgpr5, $sgpr7
+    ; CHECK: renamable $sgpr0 = S_LOAD_DWORD_IMM killed renamable $sgpr4_sgpr5, 0, 0, 0
+    ; CHECK: $m0 = S_MOV_B32 -1
+    ; CHECK: $vgpr0 = V_MOV_B32_e32 killed $sgpr0, implicit $exec, implicit $exec
+    ; CHECK: BUNDLE implicit $vgpr0, implicit $m0, implicit $exec {
+    ; CHECK:   DS_GWS_INIT $vgpr0, 8, -1, implicit $m0, implicit $exec
+    ; CHECK:   S_WAITCNT 0
+    ; CHECK: }
+    ; CHECK: BUNDLE implicit killed $vgpr0, implicit $m0, implicit $exec {
+    ; CHECK:   DS_GWS_BARRIER killed $vgpr0, 8, -1, implicit $m0, implicit $exec
+    ; CHECK:   S_WAITCNT 0
+    ; CHECK: }
+    renamable $sgpr0 = S_LOAD_DWORD_IMM killed renamable $sgpr4_sgpr5, 0, 0, 0
+    $m0 = S_MOV_B32 -1
+    $vgpr0 = V_MOV_B32_e32 $sgpr0, implicit $exec, implicit $exec
+    BUNDLE implicit $vgpr0, implicit $m0, implicit $exec {
+      DS_GWS_INIT $vgpr0, 8, -1, implicit $m0, implicit $exec
+      S_WAITCNT 0
+    }
+    BUNDLE implicit killed $vgpr0, implicit $m0, implicit $exec {
+      DS_GWS_BARRIER $vgpr0, 8, -1, implicit $m0, implicit $exec
+      S_WAITCNT 0
+    }
+
+...
Index: lib/CodeGen/ScheduleDAGInstrs.cpp
===================================================================
--- lib/CodeGen/ScheduleDAGInstrs.cpp
+++ lib/CodeGen/ScheduleDAGInstrs.cpp
@@ -1107,7 +1107,6 @@
       MachineBasicBlock::instr_iterator First = MI.getIterator();
       if (MI.isBundle()) {
         toggleKills(MRI, LiveRegs, MI, false);
-        ++First;
       }
       // Some targets make the (questionable) assumtion that the instructions
       // inside the bundle are ordered and consequently only the last use of


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