[PATCH] D63941: [Float2Int] Add support for unary FNeg to Float2Int
Cameron McInally via Phabricator via llvm-commits
llvm-commits at lists.llvm.org
Fri Jun 28 10:27:14 PDT 2019
cameron.mcinally created this revision.
cameron.mcinally added reviewers: spatel, arsenm, andrew.w.kaylor, craig.topper, kpn, jmolloy.
Herald added subscribers: llvm-commits, hiraditya, wdng.
Herald added a project: LLVM.
I'm not that familiar with ConstantRange or F2I, so a thorough review will be appreciated.
Note that I chose to fake a binary FNeg for ConstantRange purposes. I think this is safe and should limit regressions. Opposing views welcome...
Repository:
rL LLVM
https://reviews.llvm.org/D63941
Files:
llvm/lib/Transforms/Scalar/Float2Int.cpp
llvm/test/Transforms/Float2Int/basic.ll
Index: llvm/test/Transforms/Float2Int/basic.ll
===================================================================
--- llvm/test/Transforms/Float2Int/basic.ll
+++ llvm/test/Transforms/Float2Int/basic.ll
@@ -80,12 +80,11 @@
}
; CHECK-LABEL: @simple6
-; CHECK: %1 = uitofp i8 %a to float
-; CHECK: %2 = uitofp i8 %b to float
-; CHECK: %3 = fneg float %1
-; CHECK: %4 = fmul float %3, %2
-; CHECK: %5 = fptoui float %4 to i32
-; CHECK: ret i32 %5
+; CHECK: %1 = zext i8 %a to i32
+; CHECK: %2 = zext i8 %b to i32
+; CHECK: %3 = sub i32 0, %1
+; CHECK: %4 = mul i32 %3, %2
+; CHECK: ret i32 %4
define i32 @simple6(i8 %a, i8 %b) {
%1 = uitofp i8 %a to float
%2 = uitofp i8 %b to float
Index: llvm/lib/Transforms/Scalar/Float2Int.cpp
===================================================================
--- llvm/lib/Transforms/Scalar/Float2Int.cpp
+++ llvm/lib/Transforms/Scalar/Float2Int.cpp
@@ -200,6 +200,7 @@
continue;
}
+ case Instruction::FNeg:
case Instruction::FAdd:
case Instruction::FSub:
case Instruction::FMul:
@@ -240,6 +241,16 @@
case Instruction::SIToFP:
llvm_unreachable("Should have been handled in walkForwards!");
+ case Instruction::FNeg:
+ Op = [I](ArrayRef<ConstantRange> Ops) {
+ assert(Ops.size() == 1 && "its a unary operator!");
+ auto BinOp = (Instruction::BinaryOps) Instruction::FSub;
+ unsigned Size = Ops[0].getBitWidth();
+ auto Zero = ConstantRange(APInt::getNullValue(Size));
+ return Zero.binaryOp(BinOp, Ops[0]);
+ };
+ break;
+
case Instruction::FAdd:
case Instruction::FSub:
case Instruction::FMul:
@@ -466,6 +477,10 @@
NewV = IRB.CreateSExtOrTrunc(NewOperands[0], ToTy);
break;
+ case Instruction::FNeg:
+ NewV = IRB.CreateNeg(NewOperands[0], I->getName());
+ break;
+
case Instruction::FAdd:
case Instruction::FSub:
case Instruction::FMul:
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