[PATCH] D63816: [ARM] WLS/LE Code Generation

Sjoerd Meijer via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Fri Jun 28 01:09:38 PDT 2019


SjoerdMeijer added inline comments.


================
Comment at: lib/Target/ARM/ARMISelLowering.cpp:12736
+                                    const ARMSubtarget *ST) {
+  // Look for (brcond (xor test.set.loop.iterations, -1)
+  SDValue CC = N->getOperand(1);
----------------
Initially I was a bit confused by this, the xor in particular. It makes sense though, but you're not checking it here in the patterns?


Repository:
  rL LLVM

CHANGES SINCE LAST ACTION
  https://reviews.llvm.org/D63816/new/

https://reviews.llvm.org/D63816





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