[PATCH] D63816: [ARM] WLS/LE Code Generation

[Sam Parker via Phabricator via llvm-commits]

samparker created this revision.
samparker added reviewers: dmgreen, SjoerdMeijer.
Herald added subscribers: kristof.beyls, javed.absar.
Herald added a project: LLVM.
samparker added a parent revision: D63809: [HardwareLoops] Loop counter guard Loop intrinsic.

Backend changes to enable WLS/LE low-overhead loops for armv8.1-m:

1. Use TTI to communicate to the HardwareLoop pass that we should try to generate intrinsics that guard the loop entry, as well as setting the loop trip count.
2. Lower the BRCOND that uses said intrinsic to an Arm specific node: ARMWLS.
3. ISelDAGToDAG the node to a new pseudo instruction: t2WhileLoopStart.
4. Add support in ArmLowOverheadLoops to handle the new pseudo instruction.


Repository:
  rL LLVM

https://reviews.llvm.org/D63816

Files:
  lib/Target/ARM/ARMISelDAGToDAG.cpp
  lib/Target/ARM/ARMISelLowering.cpp
  lib/Target/ARM/ARMISelLowering.h
  lib/Target/ARM/ARMInstrInfo.td
  lib/Target/ARM/ARMInstrThumb2.td
  lib/Target/ARM/ARMLowOverheadLoops.cpp
  lib/Target/ARM/ARMTargetTransformInfo.cpp
  test/Transforms/HardwareLoops/ARM/do-rem.ll
  test/Transforms/HardwareLoops/ARM/fp-emulation.ll
  test/Transforms/HardwareLoops/ARM/simple-do.ll
  test/Transforms/HardwareLoops/ARM/structure.ll
  test/Transforms/HardwareLoops/ARM/while.mir

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