[PATCH] D62890: [DAGCombiner] Merge consecutive stores of vector elements before types are legalized

Nirav Dave via Phabricator via llvm-commits llvm-commits at lists.llvm.org
Mon Jun 24 07:09:28 PDT 2019


niravd added a comment.

> Cuz PPC's `allowsMemoryAccess` lacks information about which CombineLevel is at, it fails the check(Only a few vector types are allowed to have misaligned access). As a result, currently no changes happen in PPC's code. I might try to solve this problem with another patch.

Ah. Can you solve this by doing the analog to isTypeLegal (vs. isTypeLegal) and assume it's true prelegalization? If it's that small, you should (but don't feel like you must) fold it into this patch.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D62890/new/

https://reviews.llvm.org/D62890





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