[PATCH] D63709: [AMDGPU] Add peephole to optimize MOV

[Matt Arsenault via Phabricator via llvm-commits]

arsenm added a comment.

This doesn't seem like the right place to handle this. This doesn't really fit with SIShrinkInstructions. I also wouldn't expect you need to do anything special to handle this case. Why doesn't MachineCSE catch this? Can you add an IR example testcase?


Repository:
  rL LLVM

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  https://reviews.llvm.org/D63709/new/

https://reviews.llvm.org/D63709