[PATCH] D63476: [ARM] DLS/LE low-overhead loop code generation

[Sam Parker via Phabricator via llvm-commits]

samparker added a comment.

I will try to reorder the final passes. I hope that I can change the size of the pseudo instructions to be pessimistically big enough to be a cmp and br. I imagine that TTI will have to try to calculate the size, or at least the amount of live variables, so that these loops don't cause unnecessary register pressure and actually slow things down because of spills.


Repository:
  rL LLVM

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  https://reviews.llvm.org/D63476/new/

https://reviews.llvm.org/D63476